This invention relates to optical receivers, and in particular though not necessarily exclusively to optical receivers suitable for operation in optical fibre systems.
Typically photodetection in such systems relies upon the use of avalanche photodiodes or upon the combination of a PIN diode and a field effect transistor (PIN-FET combination) in which the output of the PIN diode is fed to the gate of an FET.
One of the limitations of a PIN-FET combination is the limitation set by noise considerations. The noise is proportional to the square root of the sum of the diode capacitance and the FET gate capacitance. Noise is therefore reduced and sensitivity enhanced if either or both of these capacitance values can be reduced.
British Patent Specification No. 2109991A now U.K. Pat. No. 2,109,991 corresponding to U.S. patent application Ser. No. 442,054 filed Nov. 16, 1982 and issued as U.S. Pat. No. 4,517,581 on May 14, 1985 and assigned to a common assignee describes an approach to this problem that involves a modification of the PIN FET combination in which the two components no longer exist as separate discrete entities but are combined in a manner affording low capacitance. In essence this involves ducting the light to the depletion region under the gate of a modified FET. The gate capacitance of this FET is proportional to the area of the gate, and this can be made small since the gate length is normally small anyway and the gate width can also be made relatively small. However, this approach then imposes significant constraints upon the shape of a beam of incident light that will be coupled efficiently into the depletion region, and there are also constraints involved in ensuring that that light is efficiently absorbed in that region.